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M27C405
4 Mbit (512Kb x 8) OTP EPROM
5V 10% SUPPLY VOLTAGE in READ OPERATION PIN COMPATIBLE with the 4 Mbit, SINGLE VOLTAGE FLASH MEMORY FAST ACCESS TIME: 70ns LOW POWER CONSUMPTION: - Active Current 30mA at 5MHz - Standby Current 100A PROGRAMMING VOLTAGE: 12.75V 0.25V PROGRAMMING TIMES - Typical 48sec. (PRESTO II Algorithm) - Typical 27sec. (On-Board Programming) ELECTRONIC SIGNATURE - Manufacturer Code: 20h - Device Code: B4
32
1
PDIP32 (B)
PLCC32 (K)
TSOP32 (N) 8 x 20mm
DESCRIPTION The M27C405 is a 4 Mbit EPROM offered in the OTP (one time programmable) range. It is ideally suited for microprocessor systems requiring large programs, in the application where the contents is stable and needs to be programmed only one time and is organised as 524,288 by 8 bits. The M27C405 is pin compatible with the industry standard 4 Mbit, single voltage Flash memory. It can be consideredas a Flash Low Cost solution for production quantities. The M27C405 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.
Figure 1. Logic Diagram
VCC
VPP
19 A0-A18
8 Q0-Q7
E
M27C405
Table 1. Signal Names
A0-A18 Q0-Q7 E G VPP VCC VSS March 1999 Address Inputs Data Outputs Chip Enable Output Enable Program Supply Supply Voltage Ground
G
VSS
AI01601
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M27C405
Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections
A18 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS
1 32 2 31 3 30 4 29 5 28 6 27 7 26 8 25 M27C405 9 24 10 23 11 22 12 21 13 20 14 19 15 18 16 17
AI01602
VCC VPP A17 A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3
A7 A6 A5 A4 A3 A2 A1 A0 Q0
A12 A15 A16 A18 VCC VPP A17 1 32 A14 A13 A8 A9 A11 G A10 E Q7 9 M27C405 25 17 Q1 Q2 VSS Q3 Q4 Q5 Q6
AI01603
Figure 2C. TSOP Pin Connections
A11 A9 A8 A13 A14 A17 VPP VCC A18 A16 A15 A12 A7 A6 A5 A4
1
32
8 9
M27C405 (Normal)
25 24
16
17
AI01604
G A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 A3
DEVICE OPERATION The modesof operationsof theM27C405 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for Vpp and 12V on A9 for Electronic Signature. Read Mode The M27C405 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equalto the delay from E to output (tELQV). Data is availableat the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C405 has a standby mode which reduces the active current from 30mA to 100A. The M27C405 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standbymode, the outputs are in a high impedance state, independent of the G input.
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Table 2. Absolute Maximum Ratings (1)
Symbol TA TBIAS TSTG VIO (2) V CC VA9
(2)
Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage
(3)
Value -40 to 125 -50 to 125 -65 to 150 -2 to 7 -2 to 7 -2 to 13.5 -2 to 14
Unit C C C V V V V
VPP
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is -0.5V with possible undershoot to -2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 3. Depends on range.
Table 3. Operating Modes
Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature
Note: X = VIH or VIL, VID = 12V 0.5V
E VIL VIL VIL Pulse VIH VIH VIH VIL
G VIL VIH VIH VIL VIH X VIL
A9 X X X X X X VID
VPP VCC or VSS VCC or VSS VPP VPP VPP VCC or VSS VCC
Q0 - Q7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes
Table 4. Electronic Signature
Identifier Manufacturer's Code Device Code A0 V IL VIH Q7 0 1 Q6 0 0 Q5 1 1 Q4 0 1 Q3 0 0 Q2 0 1 Q1 0 0 Q0 0 0 Hex Data 20h B4h
Two Line Output Control Because OTP EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur.
For the most efficientuse of thesetwo controllines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
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M27C405
Table 5. AC Measurement Conditions
High Speed Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages 10ns 0 to 3V 1.5V Standard 20ns 0.4V to 2.4V 0.8V and 2V
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed 3V 1.5V 0V DEVICE UNDER TEST 2.0V 0.8V
AI01822
1N914
3.3k
Standard 2.4V
OUT CL
0.4V
CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance
AI01823B
Table 6. Capacitance (1) (TA = 25 C, f = 1 MHz )
Symbol C IN COUT Parameter Input Capacitance Output Capacitance Test Condition VIN = 0V VOUT = 0V Min Max 6 12 Unit pF pF
Note: 1. Sampled only, not 100% tested.
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M27C405
Table 7. Read Mode DC Characteristics (1) (TA = 0 to 70 C or -40 to 85 C; VCC = 5V 10%; VPP = VCC)
Symbol ILI ILO ICC ICC1 ICC2 IPP VIL VIH
(2)
Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL Output High Voltage CMOS
Test Condition 0V VIN VCC 0V VOUT VCC E = VIL, G = VIL, IOUT = 0mA, f = 5MHz E = VIH E > VCC - 0.2V VPP = VCC
Min
Max 10 10 30 1 100 10
Unit A A mA mA A A V V V V V
-0.3 2 IOL = 2.1mA IOH = -400A IOH = -100A 2.4 VCC - 0.7V
0.8 VCC + 1 0.4
VOL VOH
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1) (TA = 0 to 70 C or -40 to 85 C; VCC = 5V 10%; VPP = VCC)
M27C405 Symbol Alt Parameter Test Condition -70 Min tAVQV tELQV tGLQV tEHQZ (2) tGHQZ (2) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0
(3)
-80 Min Max 80 80 40 0 0 0 30 30 0 0 0 Min
-90 Max 90 90 40 30 30
Unit
Max 70 70 35 30 30
ns ns ns ns ns ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. 3. In case of 70ns speed see High Speed AC Measurement conditions.
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M27C405
Table 8B. Read Mode AC Characteristics (1) (TA = 0 to 70 C or -40 to 85 C; VCC = 5V 10%; VPP = VCC)
M27C405 Symbol Alt Parameter Test Condition Min tAVQV tELQV tGLQV tEHQZ (2) tGHQZ (2) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0 -100 Max 100 100 50 30 30 0 0 0 Min -120 Max 120 120 60 40 40 0 0 0 Min -150 Max 150 150 60 50 50 ns ns ns ns ns ns Unit
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested.
Figure 5. Read Mode AC Waveforms
A0-A18
VALID tAVQV tAXQX
VALID
E tGLQV G tELQV Q0-Q7 tGHQZ Hi-Z tEHQZ
AI00724B
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M27C405
Table 9. Programming Mode DC Characteristics (1) (TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V)
Symbol ILI ICC IPP VIL V IH VOL V OH V ID Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL A9 Voltage IOL = 2.1mA IOH = -400A 2.4 11.5 12.5 E = VIL -0.3 2 Test Condition 0 VIN VCC Min Max 10 50 50 0.8 VCC + 0.5 0.4 Unit A mA mA V V V V V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 10. Programming Mode AC Characteristics (1) (TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V)
Symbol tAVEL tQVEL tVPHEL tVCHEL tELEH tEHQX tQXGL tGLQV tGHQZ tGHAX Alt tAS tDS tVPS tVCS tPW tDH tOES tOE tDFP tAH Parameter Address Valid to Chip Enable Low Input Valid to Chip Enable Low VPP High to Chip Enable Low VCC High to Chip Enable Low Chip Enable Program Pulse Width Chip Enable High to Input Transition Input Transition to Output Enable Low Output Enable Low to Output Valid Output Enable High to Output Hi-Z Output Enable High to Address Transition 0 0 Test Condition Min 2 2 2 2 95 2 2 100 130 105 Max Unit s s s s s s s ns ns ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested.
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M27C405
Figure 6. Programming and Verify Modes AC Waveforms
A0-A18 tAVPL Q0-Q7 tQVEL VPP tVPHEL VCC tVCHEL E tELEH G DATA IN
VALID
DATA OUT tEHQX
tGLQV
tGHQZ
tGHAX
tQXGL
PROGRAM
VERIFY
AI00725
System Considerations The power switching characteristics of Advanced CMOS OTP EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer : the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1F ceramic capacitor be used on every device between VCC and VSS. This should be a high frequencycapacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a
4.7F bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. Programming When delivered, all bits of the M27C405 are in the '1' state. Datais introducedby selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The M27C405 is in the programming mode when VPP input is at 12.75V,G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. V CC is specified to be 6.25V 0.25V.
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M27C405
Figure 7. Programming Flowchart Figure 8. On-Board Programming Flowchart
VPP = 12.75V VCC = 6.25V, VPP = 12.75V
SET MARGIN MODE
n =0
n=0
E = 100s Pulse NO ++n = 25 YES NO VERIFY YES Last Addr NO FAIL ++ Addr NO ++n = 25 YES
E = 10s Pulse
NO
VERIFY ? YES
++ Addr
FAIL
E = 10s Pulse
YES CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V
AI00760B
Last Addr
NO
YES CHECK ALL BYTES VPP = VCC
AI01349
PRESTO II Programming Algorithm PRESTO II Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 52.5 seconds.Programming with PRESTO II consists of applying a sequence of 100s program pulses to each byte until a correct verify occurs (see Figure 7). During programming and verify operation, a MARGIN MODE circuit is automaticallyactivated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell. Program Inhibit Programming of multiple M27C405s in parallelwith different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27C405 may be common. A TTL low level pulse appliedto a M27C405'sE input,with VPP at 12.75V, will program that M27C405. A high level E input inhibits the other M27C405s from being programmed.
Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL , E at VIH, VPP at 12.75V and VCC at 6.25V. On-Board Programming Programming the M27C405 may be performed directly in the application circuit, however this requires modification to the PRESTO II Algorithm (see Figure 8). For in-circuit programming VCC is determined by the user and normally is compatible with other componentsusing the same supply voltage. It is recommended that the maximum value of VCC which remains compatible with the circuit is used. Typically VCC=5.5V for programming systems using VCC=5V is recommended. The value of VCC does not affect the programming, it gives a higher test capability in VERIFY mode. VPP must be kept at 12.75 volts to maintain and enable the programming.
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M27C405
Warning: compatibility with FLASH Memory Compatibility issues may arise when replacing the compatible Single Supply 4 Megabit FLASH Memory (the M29F040) by the M27C405. The VPP pin of the M27C405 corresponds to the "W" pin of the M29F040.The M27C405V PP pin can withstand voltages up to 12.75V, while the "W" pin of the M29F040 is a normal control signal input and may be damaged if a high voltage is applied; special precautions must be taken when programming in-circuit. However if an already programmed M27C405 is used, this can be directly put in place of the FLASH Memoryas theVPP input,when not in programming mode, is set to VCC or VSS. Electronic Signature The Electronic Signature (ES) mode allows the reading out of a binary code from an OTP EPROM that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. This mode is functionalin the25C 5C ambient temperature range that is required when programming the M27C405. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C405 with VPP=VCC=5V. Two identifierbytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0=VIL) represents the manufacturer code and byte 1 (A0=VIH) the device identifier code. For the STMicroelectronics M27C405, these two identifier bytes are given in Table 4 and can be read-out on outputs Q0 to Q7.
Changes to PRESTO II. The duration of the programming pulse is reduced to 20s, making the programming time of the M27C405 comparable with the counterpart FLASH Memory.
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M27C405
ORDERING INFORMATION SCHEME Example: M27C405 -80 K 1 TR
Speed -70 (1) 70 ns -80 -90 -100 -120 -150 80 ns 90 ns 100 ns 120 ns 150 ns B K N
Package PDIP32 PLCC32 TSOP32 8 x 20mm
Temperature Range 1 6 0 to 70 C -40 to 85 C TR
Option Tape & Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
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M27C405
PDIP32 - 32 pin Plastic DIP, 600 mils width
Symb Typ A A1 A2 B B1 C D D2 E E1 e1 eA eB L S N 2.54 15.24 38.10 15.24 1.52 mm Min - 0.38 3.56 0.38 - 0.20 41.78 - - 13.59 - - 15.24 3.18 1.78 0 32 17.-78 3.43 2.03 10 Max 5.08 - 4.06 0.51 - 0.30 42.04 - - 13.84 - 0.100 0.600 1.500 0.600 0.060 Typ inches Min - 0.015 0.140 0.015 - 0.008 1.645 - - 0.535 - - 0.600 0.125 0.070 0 32 Max 0.200 - 0.160 0.020 - 0.012 1.655 - - 0.545 - - 0.700 0.135 0.080 10
A2 A1 B1 B D2 D S
N
A L eA eB C
e1
E1
1
E
PDIP
Drawing is not to scale.
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M27C405
PLCC32 - 32 lead Plastic Leaded Chip Carrier, rectangular
Symb Typ A A1 A2 B B1 D D1 D2 E E1 E2 e F R N Nd Ne CP 0.89 1.27 mm Min 2.54 1.52 - 0.33 0.66 12.32 11.35 9.91 14.86 13.89 12.45 - 0.00 - 32 7 9 0.10 Max 3.56 2.41 0.38 0.53 0.81 12.57 11.56 10.92 15.11 14.10 13.46 - 0.25 - 0.035 0.050 Typ inches Min 0.100 0.060 - 0.013 0.026 0.485 0.447 0.390 0.585 0.547 0.490 - 0.000 - 32 7 9 0.004 Max 0.140 0.095 0.015 0.021 0.032 0.495 0.455 0.430 0.595 0.555 0.530 - 0.010 -
D D1
1N
A1 A2
B1
Ne
E1 E
F 0.51 (.020)
D2/E2 B
e
1.14 (.045)
Nd
A R CP
PLCC
Drawing is not to scale.
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M27C405
TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20mm
Symb Typ A A1 A2 B C D D1 E e L N CP 0.50 0.05 0.95 0.15 0.10 19.80 18.30 7.90 0.50 0 32 0.10 mm Min Max 1.20 0.15 1.05 0.27 0.21 20.20 18.50 8.10 0.70 5 0.020 0.002 0.037 0.006 0.004 0.780 0.720 0.311 0.020 0 32 0.004 Typ inches Min Max 0.047 0.007 0.041 0.011 0.008 0.795 0.728 0.319 0.028 5
A2
1 N
e E B
N/2
D1 D
A CP
DIE
C
TSOP-a
Drawing is not to scale.
A1
L
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M27C405
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Spec ifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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